A variety of semiconductor packages are known to those skilled in the art. Kondo, U.S. Pat. No. 6,469,903 states that it discloses a semiconductor device, including the flexible printed circuit having a first area part located in the center thereof, a second area part is provided continuous thereto, a third area part is provided continuous to the first part, and a wiring pattern formed on the surface of the above-described flexible circuit. A semiconductor element is mounted on a surface of the second part, and a second semiconductor element mounted on a surface of the third part. The second part is folded to a face side of a center part and a third part is folded to a rear side of the second part. However, Kondo teaches using a spacer in between chips that prevent the chips from engaging each other to provide group-packaging alignment. Therefore, in that disclosure, the physical implementation of packaging three chips requires three separate spacers, and each spacer require a bottom and top spot glassy epoxy to stick together.
Tesser, et al., U.S. Pat. No. 5,789,815 state that it discloses a three-dimensional package having a footprint size reduced by an approximate factor of four when compared to conventional electronic packaging. The module disclosed has a protective covering, such as a cap or sealant, as a moisture barrier. Thus, high integration using flexible appendages attach to a rigid substrate and singularly folded above the substrate results in both a small footprint package and also a light package. A reel-to-reel flexible tape assembly provides pretested flex boards resulting in cost effective manufacturable package for semiconductor components. The disclosure teaches placing a microprocessor on the rigid substrate portion and semiconductor die on a flexible appendage, and the flexible appendage is folded over so that the semiconductor die overlap the microprocessor.
Nakatsuka, U.S. Pat. No. 6,208,521 discloses a semiconductor package having a central base portion with a semiconductor element mounted on the base portion and four flexible appendages extending from the base portion. Semiconductor elements are also attached on each of the flexible appendages and the flexible appendages are folded over so that they overlie the semiconductor element on the central base portion. An adhesive layer is provided to insulate the semiconductor element on the central base portion from the semiconductor element attached to one of the flexible appendages.